RISC-V is a set of instructions implementable to processors that do not need licensing fees and controlling restrictions imposed. Due to its reduced instruction set; it uses less power in general but is harder to write compilers that work on it.
Having it more popularised opens up the doors for more enthausists to enter developing with it.
Harder to write compilers for RISC? I would argue that CISC is much harder to design a compiler for.
That being said there’s a lack of standardized vector/streaming instructions in out-of-the-box RISC-V that may hurt performance, but compiler design wise it’s much easier to write a functional compiler than for the nightmare that is x86.
RISC-V is a set of instructions implementable to processors that do not need licensing fees and controlling restrictions imposed. Due to its reduced instruction set; it uses less power in general but is harder to write compilers that work on it.
Having it more popularised opens up the doors for more enthausists to enter developing with it.
Harder to write compilers for RISC? I would argue that CISC is much harder to design a compiler for.
That being said there’s a lack of standardized vector/streaming instructions in out-of-the-box RISC-V that may hurt performance, but compiler design wise it’s much easier to write a functional compiler than for the nightmare that is x86.
If that is true I don’t think it can be attributed to it being RISC
https://stackoverflow.com/questions/20298991/does-generally-risc-processors-have-lower-power-consumption-than-cisc-processors